Some issues of automation of test program generation for branch units of microprocessors
Abstract
References
1. D. Patterson, J. Henessy. Computer Organization and Design. 3rd Edition, Morgan Kaufmann, 2005.
2. Википедия (http://en.wikipedia.org), статья Branch delay slot.
3. Википедия (http://en.wikipedia.org), статья Branch predictor.
4. T.-Y. Yeh, Y.N. Patt. Two-Level Adaptive Training Branch Prediction. Proceedings of International Symposium on Microarchitecture, 1991.
5. А.С. Камкин. Генерация тестовых программ для микропроцессоров. Труды ИСП РАН, т. 14, ч. 2. М., 2008. С. 23–63.
6. MIPS64™ Architecture For Programmers. Revision 2.0. MIPS Technologies Inc., June 9, 2003.
7. A. Kamkin. MicroTESK: Automation of Test Program Generation for Microprocessors. Proceedings of East-West Design & Test Symposium, 2009.
8. http://hardware.ispras.ru.
Review
For citations:
Kamkin A.S. Some issues of automation of test program generation for branch units of microprocessors. Proceedings of the Institute for System Programming of the RAS (Proceedings of ISP RAS). 2010;18. (In Russ.)