Approach to test program development for multilevel verification
https://doi.org/10.15514/ISPRAS-2019-31(3)-5
Abstract
Development of system-on-chips or network-on-chips requires verification of standalone units (peripherals and commutators) and a system as a whole. An approach to test development for verification of programmable standalone units is presented. The tests are written in C++ using a specific API to program the device-under-test (DUT) and the test environment. The API functions are implemented in the standard environment library; the specific implementation depends on the test environment structure: a standalone device, a device as a part of controllers block or a device as a part of the whole SoC. For system-level verification the test program is translated for execution on a general-purpose core of the verified SoC as well as the standard environment library. The testbench for unit-level verification consists of the environment library and the test linked to the testbench as a PLI-application, an adapter for the DUT-system bus interface and, possibly, a specific imitator of an external device. Different devices with one programming interface can be tested by the same test program even if they have different bus interfaces; different bus interfaces require different adapters to be implemented. The presented approach gives an opportunity to use the same test program both for standalone and for system-level verification (as an integration test). The implementation of the presented approach and its application to verification of microprocessors of the Elbrus family are described.
About the Author
Pavel Viktorovich FrolovRussian Federation
The head of the sector of system-level verification in the Department of modeling and verification in JSC MCST.
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Review
For citations:
Frolov P.V. Approach to test program development for multilevel verification. Proceedings of the Institute for System Programming of the RAS (Proceedings of ISP RAS). 2019;31(3):59-66. https://doi.org/10.15514/ISPRAS-2019-31(3)-5