Investigation of the RISC-V
https://doi.org/10.15514/ISPRAS-2020-32(2)-7
Abstract
An Instruction Set Architecture (ISA) is the core around which the rest of the CPU is built. Errors or inflexibility in decisions once embedded in a system of instructions remain with this generation of processors forever. Therefore, one of the key reasons why the performance growth of modern CPUs has slowed down is that the source code of the processors “got corrupted” in literal and figurative sense of the word: the processors inside become complex which makes their further development difficult. The development of modern computers (CPU, GPU or specialized ones) is in any case an extremely expensive process consisting of a large number of costly articles. Therefore, the issue of cost of developing a processor is the corestone. In this work we conducted a study of existing popular processor command systems and made conclusions about the prospects of the RISC-V and other open source instruction set architectures. We tried to answer the following questions: why the processor instruction set architecture is really important? Why RISC-V, why is it better than the others? Which opportunities does RISC-V open for developers around the world and what analogues does it have?
About the Authors
Vladimir Alexandrovitch FROLOV
Moscow State University,
Keldysh Institute of Applied Mathematics of RAS
Russian Federation
PhD, Senior Researcher in the Keldysh Institute of Applied Mathematics, Researcher, Laboratory of Computer Graphics and Multimedia, Faculty of CMC
Russian Federation
PhD, Senior Researcher in the Keldysh Institute of Applied Mathematics, Researcher, Laboratory of Computer Graphics and Multimedia, Faculty of CMC
VVladimir Alexandrovitch GALAKTIONOV
Keldysh Institute of Applied Mathematics of RAS
Russian Federation
Doctor of Science in physics and mathematics, Professor, Head of Computer graphics department
Russian Federation
Doctor of Science in physics and mathematics, Professor, Head of Computer graphics department
Vadim Vladimirovitch SANGAROV
Moscow State University
Russian Federation
Junior Researcher in computer graphics
Russian Federation
Junior Researcher in computer graphics
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Review
For citations:
FROLOV V.A., GALAKTIONOV V.A., SANGAROV V.V. Investigation of the RISC-V. Proceedings of the Institute for System Programming of the RAS (Proceedings of ISP RAS). 2020;32(2):81-98. (In Russ.) https://doi.org/10.15514/ISPRAS-2020-32(2)-7
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