Comparison of Open Flows for Digital Hardware Development: qFlow, OpenLANE, Coriolis, and SymbiFlow
https://doi.org/10.15514/ISPRAS-2021-33(6)-8
Abstract
This paper reviews open-source tools for the logical synthesis, place-and-route, static timing analysis and topology generation hardware design stages. The following tools have been described: qFlow, OpenLANE, Coriolis, and SymbiFlow. These tools are aimed to synthesize RTL models into FPGA bitstreams or GDS II physical layouts. A PicoRV32 implementation of RISC-V microprocessor has been used for experimental evaluation of these flows. The results show that open-source flows are capable to produce physical layouts for realistic examples. At the same time, commercial CADs allow generating more effective designs in terms of clock frequency.
Keywords
About the Authors
Alexander Sergeevich KAMKINRussian Federation
PhD in Physics and Mathematics, Leading Researcher at the Software Engineering Department ISP RAS, Leading Researcher at the Plekhanov RUE, Lecturer at MSU, MIPT, and HSE
Sergey Aleksandrovich SMOLOV
Russian Federation
Researcher at the Software Engineering Department of ISP RAS, Senior Researcher at the Heterogeneous Computing Systems research lab of Plekhanov RUE
Mikhail Mikhaylovich CHUPILKO
Russian Federation
PhD in Physics and Mathematics, Senior Researcher at the Software Engineering Department of ISP RAS, Senior Researcher at the Heterogeneous Computing Systems research lab of Plekhanov RUE
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Review
For citations:
KAMKIN A.S., SMOLOV S.A., CHUPILKO M.M. Comparison of Open Flows for Digital Hardware Development: qFlow, OpenLANE, Coriolis, and SymbiFlow. Proceedings of the Institute for System Programming of the RAS (Proceedings of ISP RAS). 2021;33(6):111-130. (In Russ.) https://doi.org/10.15514/ISPRAS-2021-33(6)-8