Method for Convolutional Neural Network Hardware Implementation Based on a Residue Number System
https://doi.org/10.15514/ISPRAS-2022-34(3)-5
Abstract
Convolutional Neural Networks (CNN) show high accuracy in pattern recognition solving problem but have high computational complexity, which leads to slow data processing. To increase the speed of CNN, we propose a hardware implementation method with calculations in the residue number system with moduli of a special type and . A hardware simulation of the proposed method on Field-Programmable Gate Array for LeNet-5 CNN is trained with the MNIST, FMNIST, and CIFAR-10 image databases. It has shown that the proposed approach can increase the clock frequency and performance of the device by 11%-12%, compared with the traditional approach based on the positional number system.
About the Authors
Maria Vasilyevna VALUEVARussian Federation
Junior Researcher
Georgii Vyacheslavovich VALUEV
Russian Federation
Junior Researcher
Mikhail BABENKO
Russian Federation
Ph.D. in Physics and Mathematics
Andrei TCHERNYKH
Mexico
Received doctor of science degree at Ivannikov Institute for System Programming of the Russian Academy of Sciences, is holding a full professor position in computer science at CICESE Research Center, Ensenada, Baja California, Mexico
Jorge Mario CORTES-MENDOZA
Russian Federation
Received Ph.D. degree in 2018 from CICESE Research Center in Computer Scienc
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Review
For citations:
VALUEVA M.V., VALUEV G.V., BABENKO M., TCHERNYKH A., CORTES-MENDOZA J. Method for Convolutional Neural Network Hardware Implementation Based on a Residue Number System. Proceedings of the Institute for System Programming of the RAS (Proceedings of ISP RAS). 2022;34(3):61-74. (In Russ.) https://doi.org/10.15514/ISPRAS-2022-34(3)-5