Detection of Inaccuracies in Some Specialized Loop Optimizations in the LCC Compiler for “Elbrus” Architecture
https://doi.org/10.15514/ISPRAS-2025-37(4)-3
Abstract
This work is devoted to the development of mixed methods for analyzing inaccuracies in compiler optimizations. The development of these methods is important for “Elbrus” microprocessors with a very long instruction word (VLIW) because of static scheduling. The article analyzes existing approaches to identifying inaccuracies in optimizations and highlights their disadvantages. In this article a method is developed for detecting inaccuracies in the work of two important for VLIW optimizations: software pipeline with hardware support (overlap) and optimization of moving unlikely executed code into new outer loop (nesting). The method is implemented by instrumenting loops in the user program and obtaining static information about loops from the compiler. The method was checked on SPEC CPU 2006 and 2017 rate suites on a computer with an Elbrus-8S processor and has proven its effectiveness. The method allows to achieve a speedup of 70.7% on test 523.xalancbmk with placing hints for overlap optimization and 4.71% on test 520.omnetpp with placing hints for nesting optimization. Tests are done in base mode without profile information.
About the Authors
Alexander Viktorovich ERMOLITSKY
AO "MCST"
Russian Federation
Russian Federation
Head of the language compiler division at MCST Design Center. Research interests: compiler optimizations.
Dmitry Nikolaevich LEVCHENKO
AO “MCST”
Russian Federation
Russian Federation
Software engineer at MCST Design Center and postgraduate student at MIPT. Research interests: compiler optimizations, instrumenting profiling, machine learning compilers.
Murad Iskender-ogly NEIMAN-ZADE
AO “MCST”
Russian Federation
Russian Federation
Head of the Department of Programming Systems at MCST Design Center. His research interests include compiler optimizations, JIT compilation, profiling and accelerated computation libraries.
References
1. Mytkowicz T., Diwan A. et al. Evaluating the Accuracy of Java Profilers, PLDI, 2010, pp. 187-197.
2. Hao X., Qingsen W. et al. Can we trust profiling results?: understanding and fixing the inaccuracy in modern profilers. Proceedings of the ACM International Conference on Supercomputing. 2019. pp. 284-295. doi:10.1145/3330345.3330371.
3. Devkota S., Aschwanden P. et al. CcNav: Understanding Compiler Optimizations in Binary Code. IEEE Transactions on Visualization and Computer Graphics, 2021, pp. 667-677. doi:10.1109/TVCG.2020.3030357.
4. Marques D., Duarte H. et al. Performance Analysis with Cache-Aware Roofline Model in Intel Advi-sor. International Conference in High Performance Computing & Simulation, 2017, pp. 898-907. doi:10.1109/HPCS.2017.150.
5. Дроздов А.Ю., Степаненков А.М. Технология оптимизации циклов для архитектур с аппаратной поддержкой конвейеризации // Информационные технологии и вычислительные системы, 2004. №3, с. 52-62.
6. Maslennikov D.M., Volkonsky V.Y. Compiler Method and Apparatus for Elimination of Redundant Speculative Computations from Innermost Loops, Pat. US, №6301706B1, 2001.
7. Chetverina O. Alternatives of profile-guided code optimizations for one-stage compilation, Program-ming and Computer Software, 2016, vol. 42, no. 1, pp. 34-40. doi:10.1134/S0361768816010035.
8. SPEC Benchmarks and Tools. URL: https://spec.org/benchmarks.html#cpu (дата обращения 02.10.2024).
9.
Review
For citations:
ERMOLITSKY A.V., LEVCHENKO D.N., NEIMAN-ZADE M.I. Detection of Inaccuracies in Some Specialized Loop Optimizations in the LCC Compiler for “Elbrus” Architecture. Proceedings of the Institute for System Programming of the RAS (Proceedings of ISP RAS). 2025;37(4):51-64. (In Russ.) https://doi.org/10.15514/ISPRAS-2025-37(4)-3
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