Electrostatic Discharge Protection Devices Macromodelling Using Open-Source Tools
https://doi.org/10.15514/ISPRAS-2025-37(3)-8
Abstract
The semiconductor diode and grounded gate MOSFET (GGMOS) devices are commonly used as electrostatic discharge (ESD) protection element in CMOS ICs circuitry. This article presents an implementation of ESD diode and GGMOS macro models using open-source circuit simulation tools (Qucs-S and Ngspice). The proposed models could serve for the circuit simulation of the ESD event. Such simulation allows to estimate the ESD robustness of the IC at the early design stage.
Keywords
Supporting agencies: The research was financially supported by the Ministry of Science and Higher Education of the Russian Federation as a part of the project FSFN-2024-0086.
About the Authors
Vadim Vadimovich KUZNETSOV
Bauman Moscow State Technical University
Russian Federation
Russian Federation
Cand. Sci. (Tech.), Associate Professor of the Electronic engineering department of the Bauman Moscow State Technical University. His research interests include open-source circuit simulation software development, analog ICs design, ESD robustness of microelectronic devices.
Vladimir Victorovich ANDREEV
Bauman Moscow State Technical University
Russian Federation
Russian Federation
Dr. Sci. (Tech.), Full Professor, chief of the Electronic engineering department of the Bauman Moscow State Technical University. His research interests include MOS structures physics, ICs technology, thin dielectric films physics.
Semen Andreevich LOMAKIN
Bauman Moscow State Technical University
Russian Federation
Russian Federation
A Master student of the Electronic engineering department of the Bauman Moscow State Technical University. His research interests include analog ICs design, ESD protection structures design.
References
1. M.-F. Staniloiu, H.-S. Popescu, G. Rezmerita, I. Vlad, and M. Iordache, “SPICE model of a real Zener diode tested at room temperature,” in 2022 International Conference and Exposition on Electrical And Power Engineering (EPE). IEEE, 2022. doi: 10.1109/EPE56121.2022.9959813 pp. 182–186.
2. Y. P. Zhou, G. Ding, and J.-J. Hajjar, “ESD protection impact and modelling of bias-dependent series resistance in diodes,” in 2019 41st Annual EOS/ESD Symposium (EOS/ESD), vol. EOS-41, 2019. doi: 10.23919/EOS/ESD.2019.8869988 pp. 1–7.
3. V. Vashchenko, Y. Martynov, and V. Sinkevitch, “Electrical instability and filamentation in ggMOS protection structures,” Solid-State Electronics, vol. 41, no. 11, pp. 1761–1767, 1997.
4. Y. S. Chauhan, S. Venugopalan, N. Paydavosi, P. Kushwaha, S. Jandhyala, J. P. Duarte, S. Agnihotri, C. Yadav, H. Agarwal, A. Niknejad et al., “BSIM compact MOSFET models for SPICE simulation,” in Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems MIXDES 2013. IEEE, 2013, pp. 23–28.
5. J. Li, S. Joshi, R. Barnes, and E. Rosenbaum, “Compact modeling of on-chip ESD protection devices using Verilog-A,” IEEE Transactions on Computer-aided design of integrated circuits and systems, vol. 25, no. 6, pp. 1047–1063, 2006. doi: 10.1109/TCAD.2005.855948
6. Y. Zhou and E. Rosenbaum, “Accuracy preserving extensions to a PDK MOSFET model for ESD simulation,” in 2024 46th Annual EOS/ESD Symposium (EOS/ESD), vol. 46. IEEE, 2024, pp. 1–10.
7. V. Kuznetsov and V. Andreev, "ESD Induced Irreversible Degradation Processes in the Semiconductor Devices," 2024 6th International Youth Conference on Radio Electronics, Electrical and Power Engineering (REEPE), Moscow, Russian Federation, 2024, pp. 1-5, doi: 10.1109/REEPE60449.2024.10479847.
8. V.V. Kuznetsov, V.V. Andreev Transmission Line Pulse Setup for Electrostatic Discharge Robustness Testing of the Semiconductor Devices. Instrum Exp Tech vol. 67, pp.268–273 (2024). https://doi.org/10.1134/S0020441224700453
9. D.V. Andreev, V.M. Maslovsky, V.V. Andreev and A.A. Stolyarov, Modified Ramped Current Stress Technique for Monitoring Thin Dielectrics Reliability and Charge Degradation. Phys. Status Solidi A, vol.219: 2100400., 2022 https://doi.org/10.1002/pssa.202100400
10. M. Brinson and D. Tomaszewski, “Advances in Qucs-S schematic capture for SPICE and Verilog-A device modelling and circuit simulation,” in 2022 29th International Conference on Mixed Design of Integrated Circuits and System (MIXDES). IEEE, 2022. doi: 10.23919/MIXDES55591.2022.9838038 pp. 27–32.
11. M. Brinson and V. Kuznetsov, "Qucs-0.0.19S: A new open-source circuit simulator and its application for hardware design," 2016 International Siberian Conference on Control and Communications (SIBCON), Moscow, Russia, 2016, pp. 1-5, doi: 10.1109/SIBCON.2016.7491696
12. M. Magerl, B. Courivaud, C. Stockreiter, and A. Baric, “Modelling of a transmission line pulse measurement setup,” in 2018 41st International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO), 2018. doi: 10.23919/MIPRO.2018.8400016 pp. 84 – 88.
13. P.-C. Medinceanu and M. Enachescu, “Open Skywater130nm PDK-based IP development platform: A PWM peripheral case study,” in 2024 IEEE 22nd Mediterranean Electrotechnical Conference (MELECON). IEEE, 2024. doi: 10.1109/MELECON56669.2024.10608632 pp. 856–861.
Review
For citations:
KUZNETSOV V.V., ANDREEV V.V., LOMAKIN S.A. Electrostatic Discharge Protection Devices Macromodelling Using Open-Source Tools. Proceedings of the Institute for System Programming of the RAS (Proceedings of ISP RAS). 2025;37(3):121-130. https://doi.org/10.15514/ISPRAS-2025-37(3)-8
Email this article 