Hardware Acceleration of Qemu MMU for aarch64 on x86-64 Full System Emulation
Dmitry Nikolaevich POLETAEV,
Pavel Mikhailovich DOVGALYUK,
Georgiy Nikolaevich TEYS,
Maksim Alekseevich KOSTIN https://doi.org/10.15514/ISPRAS-2025-37(6)-35
Abstract
Full system cross-ISA emulation is widely used nowdays, but is known for being slow. Major contribution to the slowdown is made by software MMU doing guest virtual addresses translation. In article we look at optimization which allows to move part of such address translation work to the hardware MMU of the host system. For this goal, extra view to the whole guest virtual address space is added to the address space of the emulator process, using mmap system call. After mapping is done there is opportunity to use fixed offset correction to guest virtual address in the translated binary code in place of dynamic search of needed offset in software TLB. Additional view of guest virtual address space maintained coherent with guest page tables. Such approach allows to use less host instructions per each guest memory instruction, which lead to notable emulation acceleration, considering the large quantity of memory instructions in the guest execution flow. Measurments show speed up as large as 271% for benchmark tests and up to 217% for the real-world program. Ideas are proposed for overcoming some limitations of described approach.
Supporting agencies: This work is supported by Russian Science Foundation under grant number 24-11-20022, https://rscf.ru/project/24-11-20022/.
About the Authors
Dmitry Nikolaevich POLETAEV
Ivannikov Institute for System Programming of the Russian Academy of Sciences, Yaroslav-the-Wise Novgorod State University
Russian Federation
Russian Federation
Software developer at Ivannikov Institute for System Programming of the Russian Academy of Sciences. Research interests: reverse engineering, binary code analysis, virtual machines.
Pavel Mikhailovich DOVGALYUK
Ivannikov Institute for System Programming of the Russian Academy of Sciences, Yaroslav-the-Wise Novgorod State University
Russian Federation
Russian Federation
Cand. Sci. (Tech.), engineer. Research interests: virtual machines introspection and instrumentation, dynamic analysis of code, debuggers, emulators.
Georgiy Nikolaevich TEYS
Ivannikov Institute for System Programming of the Russian Academy of Sciences, Yaroslav-the-Wise Novgorod State University
Russian Federation
Russian Federation
QA engineer of the Institute for System Programming of the RAS since 2022. His research interests include processes automation in system programming.
Maksim Alekseevich KOSTIN
Ivannikov Institute for System Programming of the Russian Academy of Sciences, Yaroslav-the-Wise Novgorod State University
Russian Federation
Russian Federation
Engineer at Compiler Technology department of ISP RAS. His research interests include emulators, dynamic binary translation, optimizations.
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Review
For citations:
POLETAEV D.N., DOVGALYUK P.M., TEYS G.N., KOSTIN M.A. Hardware Acceleration of Qemu MMU for aarch64 on x86-64 Full System Emulation. Proceedings of the Institute for System Programming of the RAS (Proceedings of ISP RAS). 2025;37(6):45-58. (In Russ.) https://doi.org/10.15514/ISPRAS-2025-37(6)-35
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