Cut-based Technology Mapper with Optimizations
Mikhail Mikhaylovich CHUPILKO,
Alexander Sergeevich KAMKIN,
Daniil Renatovich GARYAEV,
Egor Sergeevich BELIN,
Grigory Aleskeevich MAZOV,
Vladislav Sergeevich SHTRENEV https://doi.org/10.15514/ISPRAS-2025-37(6)-52
Abstract
This paper addresses the problem of constructing an optimization-oriented technology mapper for logic synthesis. We present an implementation of a cut-based technology mapper developed within the Utopia EDA project, a prototype logic synthesis tool distributed under Apache 2.0 license. The proposed mapper is based on Boolean matching and supports multiple optimization objectives, including area (the total area of instantiated standard cells), power (the estimated total power consumption of the synthesized design), and timing (the estimated critical-path delay). It should be noted that targeting one objective implies accounting for constraints on the other two objectives. We provide a comparison with the technology mapper used in the OpenLane flow. Experimental results obtained on a benchmark set of thirty-one RTL designs (Verilog/SystemVerilog) demonstrate that, in the majority of cases, the proposed optimizations outperform the Yosys-based technology mapping used in OpenLane with respect to area and power. For timing optimization, the results are different, indicating directions for future work.
Keywords
technology mapping,
integrated circuits,
CAD design automation systems,
logical synthesis,
standard cells,
optimization.
Supporting agencies: This research was carried out at Plekhanov Russian University of Economics, and supported by the Russian Science Foundation, project No. 23-21-00313.
About the Authors
Mikhail Mikhaylovich CHUPILKO
Plekhanov Russian University of Economics,
Ivannikov Institute for System Programming of the Russian Academy of Sciences
Russian Federation
Russian Federation
Cand. Sci. (Phys.-Math.), senior researcher at Ivannikov Institute for System Programming of the RAS, and a senior researcher at Plekhanov Russian University of Economics. Research interests: logic synthesis, development of digital hardware, high-level synthesis, verification of RTL-models.
Alexander Sergeevich KAMKIN
Plekhanov Russian University of Economics,
Ivannikov Institute for System Programming of the Russian Academy of Sciences,
Lomonosov Moscow State University,
Moscow Institute of Physics and Technology
Russian Federation
Russian Federation
Cand. Sci. (Phys.-Math.), leading researcher at Software Engineering department of ISP RAS, leading researcher at Plekhanov Russian University of Economics. Research interests: formal methods, synthesis and verification of digital hardware, and heterogeneous computer systems.
Daniil Renatovich GARYAEV
Plekhanov Russian University of Economics,
Ivannikov Institute for System Programming of the Russian Academy of Sciences
Russian Federation
Russian Federation
A student of the «Applied Mathematics and Computer science in economics» program at the Plekhanov Russian University of Economics. His research interests include technology mapping and genetic algorithms.
Egor Sergeevich BELIN
Plekhanov Russian University of Economics,
Higher School of Economics Tikhonov Moscow Institute of Electronics and Mathematics
Russian Federation
Russian Federation
A student of the «Information Security» program at Moscow Institute for Electronics and Mathematics of Higher School of Economics. His research activity is related to the development and implementation of algorithms of technology mapping.
Grigory Aleskeevich MAZOV
Higher School of Economics Tikhonov Moscow Institute of Electronics and Mathematics
Russian Federation
Russian Federation
A student of the «Computer Security» program at Moscow Institute for Electronics and Mathematics of Higher School of Economics. His research activity is related to the development and implementation of algorithms of technology mapping.
Vladislav Sergeevich SHTRENEV
Ivannikov Institute for System Programming of the Russian Academy of Sciences,
Higher School of Economics Tikhonov Moscow Institute of Electronics and Mathematics
Russian Federation
Russian Federation
A student of the «Computer Security» program at Moscow Institute for Electronics and Mathematics of Higher School of Economics. His research activity is related to the development and implementation of algorithms of technology mapping.
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Review
For citations:
CHUPILKO M.M., KAMKIN A.S., GARYAEV D.R., BELIN E.S., MAZOV G.A., SHTRENEV V.S. Cut-based Technology Mapper with Optimizations. Proceedings of the Institute for System Programming of the RAS (Proceedings of ISP RAS). 2025;37(6):85-96. https://doi.org/10.15514/ISPRAS-2025-37(6)-52
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